So the battery of my almost brand new (ok it is from 2012) Lenovo W530 lasted about 2 minutes when not plugged into mains power. Since the laptop is still OK I bought a replacement battery that fitted fine but the laptop greeted me with the following BIOS message. Of course that is purely to protect me, because nobody else can make batteries like Lenovo. It has of course nothing to do with the fact that 3rd party batteries cost about 40euro and the Lenovo way over 100euro. [Read More]

A few years back I wrote a RISC-V core and a DVI output demo and back then I mentioned I would add extra features to both of them. The past few years I not only updated my RISC-V core, but also combined it with the DVI output core to create basically a SOC. The RISC-V core now can run GCC compiled code, so no need for hand written assembly code anymore. [Read More]

Prettige Kerst, Merry X-Mas. About 30 years ago in school I had to write one of my first C++ programs, it was supposed to print out a X-Mas tree on a green monochrome HP vt100 terminal connected to a HP-UX Unix machine. I am not going to lie, I did have to think on how to write it again :-), and I have no idea if I wrote it like this back than in the early 90’s. [Read More]

Anybody that ever did some programming on a Unix based system will be familiar with Core Dumps, but ever wondered where that name came from? It comes from a time (1950s - 1970s) where computer stored data on ferrite cores, a lot of tiny ferrite cores. And in case something went wrong, the data stored on those tiny ferrite cores was printed, dumped, on paper to be analyzed, a core dump. [Read More]

Prettige Kerst, Merry X-Mas, of course in style, by using a Digilent Nexys Video FPGA board to control a HDMI monitor. The idea behind this mini X-Mas holiday project was to create a GPU for my RISC-V core, so it could output things on a monitor instead only turn on/off some LED’s. Since my VHDL skills are still not that great and calculating 1920x1080 pixels at 60Hz would mean FPGA clocks up to 147MHz which leave very little room for mistakes. [Read More]

In 2020 I made a SID player based on a Lattice MachXO2 that was connected via SPI to a STM32G4 board running Zephyr. Now I got a Trenz SMF2000 board that has a Microsemi SmartFusion2 that has a Cortex M3 and a FPGA on one chip, so connecting the CPU to the FPGA is a lot easier. Instead of going via SPI from CPU to FPGA, it is possible to use a AHB bus to connect the CPU to the FPGA fabric. [Read More]

One of my first projects when I started working for transtechnik (now ETC) was a DMX512 router, called E-Gate. References to that project can still be found on the ETC website. And even the windows software I wrote, called E-Gatekeeper, can still be downloaded, and it still works (even on Windows 10) (E-gatekeeper screenshot image copyright by ETC GmbH) The hardware was based on a Motorola (now NXP) PowerPC MPC860 CPU with a Xilinx FPGA. [Read More]

Even tough RS232 is from the 60’s it is still something that should be available on every device (a TTL version is acceptable too). Most embedded CPU’s, even big ones like the iMX8 have one or more serial ports that are useable without the need of complex software stacks. Especially that serial ports can be used without a complex software stack, on some CPU’s it can be as simple as writing a byte to a register, makes them a very powerful tool. [Read More]

If you wish to make an apple pie from scratch, you must first invent the universe. The famous quote from Carl Sagan could also be applied to computer science, if you want to make a program from scratch you must first invent the universe. Since I only had 2 weeks vacation, and inventing a whole universe would have been to much work, I skipped a few parts and started with designing a RISC-V core. [Read More]